 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| 74LVQ241 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs April 1998 74LVQ241 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs General Description The LVQ241 is an octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which provides improved PC board density. Features n Ideal for low power/low noise 3.3V applications n Implements patented EMI reduction circuitry n Available in SOIC JEDEC, SOIC EIAJ and QSOP packages n Guaranteed simultaneous switching noise level and dynamic threshold performance n Improved latch-up immunity n Guaranteed incident wave switching into 75 n 4 kV minimum ESD immunity Ordering Code: Order Number 74LVQ241SC 74LVQ241SJ 74LVQ241QSC Package Number M20B M20D MQA20 Package Description 20-Lead (0.300" Wide) Molded Small Outline Package, SOIC JEDEC 20-Lead Molded Shrink Small Outline Package, SOIC EIAJ 20-Lead (0.150" Wide) Molded Shrink Small Outline Package, SSOP JEDEC Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code. Logic Symbol IEEE/IEC Connection Diagram Pin Assignment for SOIC andQSOP DS011355-2 DS011355-1 (c) 1998 Fairchild Semiconductor Corporation DS011355 www.fairchildsemi.com Truth Tables Inputs OE1 L L H Inputs OE2 L H H H = HIGH Voltage Level X = Immaterial L = LOW Voltage Level Z = High Impedance Outputs In L H X (Pins 12, 14, 16, 18) L H Z Outputs In X H L (Pins 3, 5, 7, 9) Z H L Pin Descriptions Pin Names OE1, OE2 I0-I7 O0-O7 Inputs Outputs Description 3-STATE Output Enable Inputs www.fairchildsemi.com 2 Absolute Maximum Ratings (Note 1) Supply Voltage (VCC) DC Input Diode Current (IIK) VI = -0.5V VI = VCC + 0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO = -0.5V VO = VCC + 0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current (ICC or IGND) Storage Temperature (TSTG) DC Latch-Up Source or Sink Current -0.5V to +7.0V -20 mA +20 mA -0.5V to VCC + 0.5V -20 mA +20 mA -0.5V to VCC + 0.5V Recommended Operating Conditions (Note 2) Supply Voltage (VCC) Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) Minimum Input Edge Rate V/t VIN 0.8V to 2.0V VCC @ 3.0V 2.0V to 3.6V 0V to VCC 0V to VCC -40C to +85C 125 mV/ns 50 mA 400 mA -65C to +150C 300 mA Note 1: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings.The "Recommended Operating Conditions" table will define the conditionsfor actual device operation Note 2: Unused inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol Parameter VCC (V) 3.0 3.0 3.0 3.0 3.0 3.0 3.6 3.6 3.6 3.6 3.6 4.0 0.002 TA = +25C Typ VIH VIL VOH Minimum High Level Input Voltage Maximum Low Level Input Voltage Minimum High Level Output Voltage VOL Maximum Low Level Output Voltage IIN IOLD IOHD ICC IOZ Maximum Input Leakage Current Minimum Dynamic Output Current (Note 4) Maximum Quiescent Supply Current Maximum 3-STATE Leakage Current VOLP VOLV VIHD VILD Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL Maximum High Level Dynamic Input Voltage Maximum Low Level Dynamic Input Voltage Note 3: All outputs loaded; thresholds on input associated with output under test. Note 4: Maximum test duration 2.0 ms, one output loaded at a time. Note 5: Incident wave switching on transmission lines with impedances as low as 75 for commercial temperature range is guaranteed for 74LVQ. Note 6: Worst case package. Note 7: Max number of outputs defined as (n). Data Inputs are driven 0V to 3.3V. One output @ GND. Note 8: Max number of Data Inputs (n) switching. n-1 Inputs switching 0V to 3.3V. Input-under-test switching: 3.3V to threshold (VILD), 0V to threshold (VIHD), f = 1 MHz. TA = -40C to +85C Guaranteed Limits Units Conditions 1.5 1.5 2.99 2.0 0.8 2.9 2.58 0.1 0.36 2.0 0.8 2.9 2.48 0.1 0.44 V V V V V V A mA mA A A VOUT = 0.1V or VCC - 0.1V VOUT = 0.1V or VCC - 0.1V IOUT = -50 A VIN = VIL or VIH (Note 3) IOH = -12 mA IOUT = 50 A VIN = VIL or VIH (Note 3) IOL = 12 mA VI = VCC, GND VOLD = 0.8V Max (Note 5) VOHD = 2.0V Min (Note 5) VIN = VCC or GND VI (OE) = VIL, VIH VI = VCC, GND VO = VCC, GND 0.1 1.0 36 -25 40.0 0.25 2.5 3.3 3.3 3.3 3.3 0.4 -0.4 1.6 1.6 0.8 -0.8 2.0 0.8 V V V V (Notes 6, 7) (Notes 6, 7) (Notes 6, 8) (Notes 6, 8) 3 www.fairchildsemi.com AC Electrical Characteristics TA = +25C Symbol Parameter VCC (V) Min tPHL tPLH tPZL tPZH tPHZ tPLZ tOSHL tOSLH Output to Output Skew Data to Output (Note 9) Output Disable Time Propagation Delay Data to Output Output Enable Time 2.7 3.3 0.3 2.7 3.3 0.3 2.7 3.3 0.3 2.7 3.3 0.3 2.0 2.0 2.5 2.5 1.0 1.0 CL = 50 pF Typ 7.8 6.5 9.6 8.0 10.2 8.5 1.0 1.0 Max 12.7 9.0 18.3 13.0 20.4 14.5 1.5 1.5 TA = -40C to +85C CL = 50 pF Min 2.0 2.0 2.5 2.5 1.0 1.0 Max 14.0 9.5 19.0 13.5 21.0 15.0 1.5 1.5 ns ns ns ns Units Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.The specification applies to any outputs switching in the same direction,either HIGH to LOW (tOSHL) or LOW to HIGH (tOSLH). Parameter guaranteed by design. Capacitance Symbol CIN CPD (Note 10) Parameter Input Capacitance Power Dissipation Capacitance Typ 4.5 70 Units pF pF Conditions VCC = Open VCC = 3.3V Note 10: CPD is measured at 10 MHz. www.fairchildsemi.com 4 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead (0.300" Wide) Molded Small Outline Package, SOIC JEDEC Package Number M20B 20-Lead Molded Shrink Small Outline Package, SOIC EIAJ Package Number M20D 5 www.fairchildsemi.com 74LVQ241 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead (0.150" Wide) Molded Shrink Small Outline Package, SSOP JEDEC (also known as QSOP) Package Number MQA20 LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or sysdevice or system whose failure to perform can be reatems which, (a) are intended for surgical implant into sonably expected to cause the failure of the life support the body, or (b) support or sustain life, and (c) whose device or system, or to affect its safety or effectiveness. failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. Fairchild Semiconductor Corporation Americas Customer Response Center Tel: 1-888-522-5372 Fairchild Semiconductor Europe Fax: +49 (0) 1 80-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 8 141-35-0 English Tel: +44 (0) 1 793-85-68-56 Italy Tel: +39 (0) 2 57 5631 Fairchild Semiconductor Hong Kong Ltd. 13th Floor, Straight Block, Ocean Centre, 5 Canton Rd. Tsimshatsui, Kowloon Hong Kong Tel: +852 2737-7200 Fax: +852 2314-0061 National Semiconductor Japan Ltd. Tel: 81-3-5620-6175 Fax: 81-3-5620-6179 www.fairchildsemi.com Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. |
Price & Availability of 74LVQ241SC
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |